diff --git a/src/flash/nor/at32f4xx.c b/src/flash/nor/at32f4xx.c index 0b1a6f534..644114a39 100644 --- a/src/flash/nor/at32f4xx.c +++ b/src/flash/nor/at32f4xx.c @@ -46,6 +46,7 @@ #define FLASH_MASS_ERASE_TIMEOUT 120000 #define BANK1_BASE_ADDR 0x08000000 +#define BANK1_EXT_BASE_ADDR 0x1fffe400 #define BANK2_BASE_ADDR 0x08080000 #define BANK2_BASE_ADDR_4M 0x08200000 #define SPIM_BASE_ADDR 0x08400000 @@ -167,6 +168,13 @@ static int at32x_get_product_id(struct flash_bank *bank, uint32_t *product_id) static int at32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_in_kb) { struct target *target = bank->target; + + if (bank->base == BANK1_EXT_BASE_ADDR) + { + *flash_size_in_kb = 4; + return ERROR_OK; + } + int retval; retval = target_read_u16(target, AT32_FLASH_SIZE_ADDR, flash_size_in_kb); if (retval != ERROR_OK) @@ -356,7 +364,7 @@ static int at32_get_device_info(struct flash_bank *bank) { at32x_info->usd_addr = at32_mcu_type[at32x_info->type_id].usd_addr; } - if(at32x_info->bank_addr == BANK1_BASE_ADDR) + if(at32x_info->bank_addr == BANK1_BASE_ADDR || at32x_info->bank_addr == BANK1_EXT_BASE_ADDR) { if(at32x_info->cur_reg_base == 0) at32x_info->cur_reg_base = at32_mcu_type[at32x_info->type_id].flash_bank1_reg; diff --git a/usr/share/openocd/scripts/target/at32f421xx.cfg b/at32f421xx.cfg index 3197261..1278514 100644 --- a/usr/share/openocd/scripts/target/at32f421xx.cfg +++ b/at32f421xx.cfg @@ -55,9 +55,8 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 # flash size will be probed -set _FLASHNAME $_CHIPNAME.bank1 -flash bank $_FLASHNAME $_CHIPNAME 0x08000000 0 0 0 $_TARGETNAME - +flash bank $_CHIPNAME.main $_CHIPNAME 0x08000000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.ext $_CHIPNAME 0x1fffe400 0 0 0 $_TARGETNAME # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz adapter speed 5000